In circuit design it is frequently necessary to interface TTL signal levels with MOS circuits which typically have a different set of signal levels. For example, typical TTL logic levels can be 0.8 and 2.4 volts while MOS logic levels are approximately 0.0 and 5.0 volts. A number of different types of interface circuits have been used including conventional amplifiers and Schmidt trigger circuits. The low voltage differentials for TTL circuits present a problem since the MOS circuits require a much greater voltage differential between the logic levels. A primary limitation of conventional interface circuits is the slow transition speed of the MOS logic signal in response to a change in the logic level of the TTL signal.
In view of the speed limitations inherent in conventional interface circuits between TTL and MOS circuits, there exists a need for an interface buffer circuit for receiving a TTL logic signal and producing an MOS logic signal with a rapid response rate.